
8
LTC1286/LTC1298
BLOCK DIAGRAM
W
–
+
CSAMPLE
VCC (VCC/VREF)
CS/SHDN
CLK
DOUT
IN+ (CH0)
IN– (CH1)
MICROPOWER
COMPARATOR
CAPACITIVE DAC
VREF
GND
PIN NAMES IN PARENTHESES
REFER TO THE LTC1298
(DIN)
BIAS AND
SHUTDOWN CIRCUIT
SAR
SERIAL PORT
TEST CIRCUITS
DOUT
1.4V
3k
100pF
TEST POINT
LTC1286/98 TC01
DOUT
VOL
VOH
tr
tf
LTC1286/98 TC02
Voltage Waveforms for DOUT Rise and Fall Times, tr, tf
Load Circuit for tdDO, tr and tf
Load Circuit for tdis and ten
Voltage Waveforms for DOUT Delay Times, tdDO
CLK
DOUT
VIL
tdDO
VOL
VOH
LTC1286/98 TC03
DOUT
3k
100pF
TEST POINT
VCC tdis WAVEFORM 2, ten
tdis WAVEFORM 1
LTC1286/98 TC04